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本帖最后由 choi 于 3-25-2021 10:46 编辑
(1) Press release (not in English but in Chinese (simplified and traditional characters) 新聞:
譚仲民 (副總經理 who doubles as 新聞發言人), 力積電銅鑼新廠動土典禮.
https://www.powerchip.com/news_ii.html?getId=17&getId1=233
("總投資新台幣2780億元 [today: $1 = NT$28.61; 新台幣2780億元 is slightly less than $1b] 的力晶積成電子股份有限公司(簡稱力積電)銅鑼12吋晶圓廠，3月25日在國內外400餘位重量級產官代表見證下正式動土興建。總產能每月10萬片將自2023年起分期投產，在竹、苗地區創造逾3000個優質工作機會、滿載年產值超過600億元，以成熟製程、創新技術為主力的新廠營運模式，將開創反摩爾定律(Reverse-Moore's Law)的半導體產業新賽局。 * * * 美國在台協會代表 * * * 均應邀出席，力積電董事長黃崇仁表示，自25年前力晶在新竹科學園區興建第一座8吋晶圓廠後 * * * 黃崇仁指出，車用、5G、AIoT等晶片新需求快速興起，已經對全球產業造成結構性的改變，目前市場對成熟製程的晶片需求出現大爆發，而且未來供不應求將更嚴重，因此，過去以推進製程技術來降低成本賺取利潤的摩爾定律必須修正。 針對力積電銅鑼新廠的營運策略，黃崇仁特別獨創反摩爾定律( Reverse-Moore's Law)來說明，一條12吋晶圓生產線的投資動輒近新台幣千億元，尖端3奈米12吋新廠投資更接近6千億，晶圓製造廠承受了極大的財務、技術、營運風險，而毛利率如果有2、30%就算不錯了，反觀IC設計和其他半導體周邊配套行業，卻享受著本小利厚的經營果實，Reverse-Moore's Law就是要改變這種失衡的供應鏈結構，晶圓製造與其他上、下游周邊行業必須要建立利潤共享、風險分擔的新合作模式，才能讓半導體產業健康發展下去。 * * * 力積電是全球唯一同時擁有記憶體和邏輯製程技術的專業晶圓代工廠商，雖然製程不是最尖端，但該公司善用獨特專長已成功推出記憶體與邏輯晶圓堆疊的Interchip技術，透過異質晶圓堆疊突破了晶片之間資料傳輸的瓶頸，讓運算效能、省電效率都大幅躍進2、3個製程世代 * * * 力積電銅鑼新廠 * * * 製程技術涵蓋1x到50奈米，堪稱是成熟製程半導體晶片最大最新的製造基地")
(2) Lisa Wang, Powerchip Breaks Ground for NT$278bn Miaoli Fab. Taipei Times, Mar 26, 2021
https://taipeitimes.com/News/biz/archives/2021/03/26/2003754498
Quote:
"The severe shortage [of logic, not memory, chips earlier this year] has led to an increase in chip prices of 30 to 40 percent since the end of last year, [Frank] Huang said, adding that he expects that prices would increase further, with a new wave of hikes as early as next month. 'I have been working in the semiconductor industry for a long time, but I have never seen any structural shortage like this before,' he said.
"While major chipmakers [eg, TSMC] have invested in advanced technologies, such as 3-nanometer technology developed by Taiwan Semiconductor Manufacturing Co (台積電), they did not invest in less advanced technologies, which are also used in electric vehicles, Internet-of-Things equipment and 5G devices, he [Huang] said. Powerchip's new fab in the Tongluo Science Park (銅鑼科學園區) would from 2023 make chips with 45-nanometer and 50-nanometer technologies, Huang said.
Management ICs, touch sensors, vehicle chips and driver ICs for flat panels would be made at the new fab, he said.
"Huang said that Taiwan offers the most competitive environment for semiconductor firms, with production costs lower than in other countries, including China.
My comment:
(a) Powerchip Semiconductor Manufacturing Corp 力晶積成電子股份有限公司 (簡稱力積電)
黃崇仁 Frank Huang
(b) The dates above -- Mar 25 in (1) and 26 in (2) -- are dates in Taiwan. They occurred on Mar 24 and 25, respectively in US.
(c) Reading (1) alone, one does not know what it was saying. Together with (2), I get it:
(i) The "1" in "製程技術涵蓋1x到50奈米" in (1) may be a boast (and unrealistic).
(ii) In (1), the 成熟製程 described by Huang is his euphemism for 45-50 nm in logic chips. \
Contrast
Ramish Zafar, SMIC Rumored To Have Achieved 95% 14nm Chip Yield – But Industry Insiders Doubt The Claim. Wccftech, Mar 11, 2021
https://wccftech.com/smic-rumore ... rs-doubt-the-claim/ ("some experts have also questioned whether it's possible for SMIC to achieve the high rate given that the 14-nanometer node accounts for less than 10% of the company's overall product sales")
(iii) What Powerchip says is that is not our direction: We are 反摩爾定律 (Reverse-Moore's Law), going the other direction (45-50nm).
(d) 堆疊 3D Wafer on Wafer (WoW）
(i)
(A) glossary of microelectronics manufacturing terms
https://en.wikipedia.org/wiki/Gl ... manufacturing_terms
("• chip - an integrated circuit; may refer to either a bare die or a packaged device;
• dicing - cutting a processed semiconductor wafer into separate dies
• die - an unpackaged integrated circuit; a rectangular piece cut (diced) from a processed wafer
• wafer - a disk of semiconductor material (usually silicon) on which electronic circuitry can be fabricated
• wafer-to-wafer (also wafer-on-wafer) stacking - bonding and integrating whole processed wafers atop one another before dicing the stack into dies")
(B) "dice" may be a noun or a verb (read definitions yourself) -- "Usage[:] Historically, dice is the plural of die, but in modern standard English dice is both the singular and the plural: throw the dice could mean a reference to either one or more than one dice")
https://www.lexico.com/definition/dice
But see
die (n; read the definitions yourself)
https://www.lexico.com/definition/die
It is interesting to read an example: "Basically players each choose a team of 5 dice, and take turns throwing a die onto the table." Here the singular is die, but in the preceding page for dice, the singular was "dice."
Defined as a cube, "die" is never used as a verb -- hence "dicing" in Note (d)(i)(A).
(ii) three-dimensional integrated circuit
https://en.wikipedia.org/wiki/Th ... _integrated_circuit
(section 2 Manufacturing technologies for 3D SiCs: Die-to-Die, Die-to-Wafer, and Wafer-to-Wafer)
I know nothing about chips, but believe the sectional heading "Manufacturing technologies for 3D SiCs" should have "3D SICs" --with I in upper, not lower, case, standing for "3D stacked ICs." Integrated circuits) as explained in the Introduction of this Wiki page.
(iii) management IC = battery or power management IC
(iv) driver IC
(A) "The motor driver IC is an integrated circuit chip used as a motor controlling device in autonomous robots and embedded circuits." from the Web.
(B) driver circuit
https://en.wikipedia.org/wiki/Driver_circuit
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发表于 3-25-2021 10:12:24
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